Invention Grant
- Patent Title: Memory system
- Patent Title (中): 内存系统
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Application No.: US12325006Application Date: 2008-11-28
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Publication No.: US07782669B2Publication Date: 2010-08-24
- Inventor: Hiroshi Sukegawa
- Applicant: Hiroshi Sukegawa
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-309096 20071129
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A memory system includes a nonvolatile memory including a plurality of memory cells, each memory cell being configured to store n levels (n is a natural number of not less than 3) in accordance with a threshold voltage, and a converter which encodes input data in the form of a bit string, records the encoded data in the nonvolatile memory, and limits a difference between levels which adjacent memory cells can take to not more than a predetermined level lower than the n levels.
Public/Granted literature
- US20090141552A1 MEMORY SYSTEM Public/Granted day:2009-06-04
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