Invention Grant
US07782697B2 DRAM with hybrid sense amplifier 有权
DRAM与混合读出放大器

DRAM with hybrid sense amplifier
Abstract:
In one embodiment, a hybrid DRAM is provided that includes: a sense amplifier including a differential amplifier and regenerative latch, wherein the differential amplifier and regenerative latch are constructed using core transistors; and a plurality of memory cells coupled to the sense amplifier through a pair of bit lines, wherein the memory cells are constructed using I/O transistors.
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