Invention Grant
US07786531B2 MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification
有权
MOSFET具有栅极上的第二聚和多晶硅介质层，用于同步整流
- Patent Title: MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification
- Patent Title (中): MOSFET具有栅极上的第二聚和多晶硅介质层，用于同步整流
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Application No.: US11182918Application Date: 2005-07-14
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Publication No.: US07786531B2Publication Date: 2010-08-31
- Inventor: Sik K. Lui , Anup Bhalla
- Applicant: Sik K. Lui , Anup Bhalla
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha & Omega semiconductor Ltd.
- Current Assignee: Alpha & Omega semiconductor Ltd.
- Current Assignee Address: US CA Sunnyvale
- Agent Bo-In Lin
- Main IPC: H01L29/94
- IPC: H01L29/94
Abstract:
This invention discloses a new trenched vertical semiconductor power device that includes a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate. In a specific embodiment, the trenched vertical semiconductor power device may be a trenched metal oxide semiconductor field effect transistor (MOSFET) power device. The trenched gate is a trenched polysilicon gate and the conductive layer is a second polysilicon layer covering an inter-poly dielectric layer disposed on top of the trenched polysilicon gate. The conductive layer is further connected to a source of the vertical power device.
Public/Granted literature
- US20060220107A1 MOSFET with a second poly and an inter-poly dielectric layer over gate for synchronous rectification Public/Granted day:2006-10-05
Information query
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