An exemplary inverter circuit (2) includes a first switch circuit (22) including a first transistor (221) and a second transistor (222); a second switch circuit (23) including a third transistor (231) and a fourth transistor (232); and a pulse width modulation circuit (21) including a first output terminal (211) and a second output terminal (212). A gate electrode of the first transistor is connected to the first output port. A gate electrode of the second transistor is connected to the second output port. A gate electrode of the third transistor is connected to the first output port. A gate electrode of the fourth transistor is connected to the second output port. A drain electrode of the third transistor is connected to a drain electrode of the first transistor, and a drain electrode of the fourth transistor is connected to a drain electrode of the second transistor.