Invention Grant
- Patent Title: Interference analysis method, interference analysis device, interference analysis program and recording medium with interference analysis program recorded thereon
- Patent Title (中): 干扰分析方法,干扰分析装置,干扰分析程序和记录有干扰分析程序的记录介质
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Application No.: US11076212Application Date: 2005-03-08
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Publication No.: US07788076B2Publication Date: 2010-08-31
- Inventor: Hideki Iwaki , Tetsuyoshi Ogura , Naoki Komatsu , Takeshi Nakayama , Tomohiro Kinoshita
- Applicant: Hideki Iwaki , Tetsuyoshi Ogura , Naoki Komatsu , Takeshi Nakayama , Tomohiro Kinoshita
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2004-063520 20040308
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An interference analysis device can be provided, which analyzes interference between wirings of a circuit board with reduced load and for a short time period. The interference analysis device according to the present invention includes: a design data input part for inputting design data of the circuit board; a noise characteristics setting part that sets data representing electrical characteristics of noise for a wiring of the circuit board; a limit value setting part that sets an allowable limit value of noise received by a wiring; a selection part that selects a wiring group to be analyzed based on the noise characteristics data and the allowable limit value; an interference analysis part that calculates, concerning the selected wiring group, an amount of interference from a wiring giving the interference to a wiring receiving the interference; and a received noise level calculation part that calculates a noise level that the wiring receiving the interference will receive.
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