Invention Grant
US07790489B2 III-V group nitride system semiconductor self-standing substrate, method of making the same and III-V group nitride system semiconductor wafer
有权
III-V族氮化物系半导体自立式衬底，制造相同方法和III-V族氮化物系半导体晶片
- Patent Title: III-V group nitride system semiconductor self-standing substrate, method of making the same and III-V group nitride system semiconductor wafer
- Patent Title (中): III-V族氮化物系半导体自立式衬底，制造相同方法和III-V族氮化物系半导体晶片
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Application No.: US11790005Application Date: 2007-04-23
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Publication No.: US07790489B2Publication Date: 2010-09-07
- Inventor: Masatomo Shibata
- Applicant: Masatomo Shibata
- Applicant Address: JP Tokyo
- Assignee: Hitachi Cable, Ltd.
- Current Assignee: Hitachi Cable, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2004-233701 20040810
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A III-V group nitride system semiconductor self-standing substrate has: a first III-V group nitride system semiconductor crystal layer that has a region with dislocation lines gathered densely, the dislocation lines being gathered substantially perpendicular to a surface of the substrate, and a region with dislocation lines gathered thinly; and a second III-V group nitride system semiconductor crystal layer that is formed up to 10 μm from the surface of the substrate on the first III-V group nitride system semiconductor crystal layer and that has a dislocation density distribution that is substantially uniform.
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