Invention Grant
US07790516B2 Method of manufacturing at least one semiconductor component and memory cells
有权
制造至少一个半导体部件和存储单元的方法
- Patent Title: Method of manufacturing at least one semiconductor component and memory cells
- Patent Title (中): 制造至少一个半导体部件和存储单元的方法
-
Application No.: US11483968Application Date: 2006-07-10
-
Publication No.: US07790516B2Publication Date: 2010-09-07
- Inventor: Josef Willer , Nicolas Nagel
- Applicant: Josef Willer , Nicolas Nagel
- Applicant Address: DE Munich
- Assignee: Qimonda AG
- Current Assignee: Qimonda AG
- Current Assignee Address: DE Munich
- Main IPC: H01L21/82
- IPC: H01L21/82
Abstract:
A method of manufacturing at least one NAND-coupled semiconductor component is disclosed. A layer structure is formed on or above a semiconductor substrate. The layer structure is patterned to expose at least one region to be doped. The exposed region is doped and annealed. The patterned layer structure is at least partially removed. Replacing material is formed in the region in which the patterned layer structure has been removed, thereby forming the at least one NAND-coupled semiconductor component.
Public/Granted literature
- US20080009115A1 Method of manufacturing at least one semiconductor component and memory cells Public/Granted day:2008-01-10
Information query
IPC分类:
