Invention Grant
- Patent Title: Methods for forming high performance gates and structures thereof
- Patent Title (中): 形成高性能栅极的方法及其结构
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Application No.: US12170687Application Date: 2008-07-10
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Publication No.: US07790553B2Publication Date: 2010-09-07
- Inventor: Huilong Zhu , Xiaomeng Chen , Mahender Kumar , Brian J. Greene , Bachir Dirahoui , Jay W. Strane , Gregory G. Freeman
- Applicant: Huilong Zhu , Xiaomeng Chen , Mahender Kumar , Brian J. Greene , Bachir Dirahoui , Jay W. Strane , Gregory G. Freeman
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Joseph Petrokaitis
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
Methods for forming high performance gates in MOSFETs and structures thereof are disclosed. One embodiment includes a method including providing a substrate including a first short channel active region, a second short channel active region and a long channel active region, each active region separated from another by a shallow trench isolation (STI); and forming a field effect transistor (FET) with a polysilicon gate over the long channel active region, a first dual metal gate FET having a first work function adjusting material over the first short channel active region and a second dual metal gate FET having a second work function adjusting material over the second short channel active region, wherein the first and second work function adjusting materials are different.
Public/Granted literature
- US20100006926A1 METHODS FOR FORMING HIGH PERFORMANCE GATES AND STRUCTURES THEREOF Public/Granted day:2010-01-14
Information query
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