Invention Grant
- Patent Title: Methods for fabricating active devices on a semiconductor-on-insulator substrate utilizing multiple depth shallow trench isolations
- Patent Title (中): 使用多深度浅沟槽隔离件在绝缘体上半导体衬底上制造有源器件的方法
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Application No.: US12108851Application Date: 2008-04-24
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Publication No.: US07790564B2Publication Date: 2010-09-07
- Inventor: Wagdi W. Abadeer , Kiran V. Chatty , Robert J. Gauthier, Jr. , Jed H. Rankin , Robert R. Robison , William R. Tonti
- Applicant: Wagdi W. Abadeer , Kiran V. Chatty , Robert J. Gauthier, Jr. , Jed H. Rankin , Robert R. Robison , William R. Tonti
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Wood, Herron & Evans, LLP
- Main IPC: H01L21/331
- IPC: H01L21/331 ; H01L21/76 ; H01L21/22 ; H01L21/38 ; H01L21/762
Abstract:
Methods for fabricating a device structure in a semiconductor-on-insulator substrate. The method includes forming a first isolation region in the substrate device layer that extends from a top surface of the device layer to a first depth and forming a second isolation region in the semiconductor layer that extends from the top surface of the semiconductor layer to a second depth greater than the first depth. The method further includes forming a doped region of the device structure in the semiconductor layer that is located vertically between the first isolation region and the insulating layer.
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