Invention Grant
- Patent Title: Dual gate of semiconductor device capable of forming a layer doped in high concentration over a recessed portion of substrate for forming dual gate with recess channel structure and method for manufacturing the same
- Patent Title (中): 能够形成在衬底的凹陷部分上以高浓度掺杂的层以形成具有凹槽通道结构的双栅极的半导体器件的双栅极及其制造方法
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Application No.: US11968461Application Date: 2008-01-02
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Publication No.: US07790588B2Publication Date: 2010-09-07
- Inventor: Young Hoon Kim
- Applicant: Young Hoon Kim
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0116054 20071114
- Main IPC: H01L21/425
- IPC: H01L21/425
Abstract:
A dual gate of a semiconductor device includes a semiconductor substrate divided into a cell region with a recessed gate forming area and a peripheral region with PMOS and NMOS forming areas; first and second conductive type SiGe layers, the first conductive type SiGe layer being formed over the cell region and the PMOS forming area of the peripheral region, and the second conductive type SiGe layer being formed over the NMOS forming area of the peripheral region; first and second conductive type polysilicon layers, the first conductive type polysilicon layer being formed over the first conductive type SiGe layer and the second conductive type polysilicon layer being formed over the second conductive type SiGe layer; and a metallic layer and a hard mask layer stacked over the first and second conductive type polysilicon layers.
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