Invention Grant
- Patent Title: Semiconductor constructions
- Patent Title (中): 半导体结构
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Application No.: US12399266Application Date: 2009-03-06
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Publication No.: US07791143B2Publication Date: 2010-09-07
- Inventor: Lee DeBruler
- Applicant: Lee DeBruler
- Applicant Address: unknown Boise ID
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: unknown Boise ID
- Agency: Wells St. John P.S.
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062

Abstract:
In some embodiments, an opening is formed through a first material, and sidewall topography of the opening is utilized to form a pair of separate anisotropically etched spacers. The spacers are utilized to pattern lines in material underlying the spacers. Some embodiments include constructions having one or more openings which contain steep sidewalls joining to one another at shallow sidewall regions. The constructions may also contain lines along and directly against the steep sidewalls, and spaced from one another by gaps along the shallow sidewall regions.
Public/Granted literature
- US20090166699A1 Semiconductor Constructions Public/Granted day:2009-07-02
Information query
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