Invention Grant
- Patent Title: High-performance FET device layout
- Patent Title (中): 高性能FET器件布局
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Application No.: US11923919Application Date: 2007-10-25
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Publication No.: US07791160B2Publication Date: 2010-09-07
- Inventor: Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
- Applicant: Jonghae Kim , Sungjae Lee , Jean-Olivier Plouchart , Scott Keith Springer
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent Richard M. Kotulak
- Main IPC: H01L29/786
- IPC: H01L29/786

Abstract:
A fast FET, a method and system for designing the fast FET and a design structure of the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.
Public/Granted literature
- US20090108349A1 HIGH-PERFORMANCE FET DEVICE LAYOUT Public/Granted day:2009-04-30
Information query
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