Invention Grant
- Patent Title: On-chip jitter measurement circuit
- Patent Title (中): 片上抖动测量电路
-
Application No.: US12125730Application Date: 2008-05-22
-
Publication No.: US07791330B2Publication Date: 2010-09-07
- Inventor: David F. Heidel , Keith A. Jenkins
- Applicant: David F. Heidel , Keith A. Jenkins
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: F. Chau & Associates, LLC
- Main IPC: G01R13/02
- IPC: G01R13/02

Abstract:
An on-chip jitter measurement circuit and corresponding method are provided for receiving a reference clock and a signal of interest, the circuit including a latch for latching and comparing the arrival time of the signal of interest to the reference clock, a clock counter in signal communication with the latch for counting the number of reference clock cycles received and latched, a delay chain in signal communication with the reference clock for varying the arrival time of the reference clock, the delay chain having a first stage, middle stages, and a last stage, and a voltage controller in signal communication with at least one of the middle stages of the delay chain for controlling the delay of the arrival time of the reference clock, wherein the voltage controller controls the first and last stages of the delay chain to retain a full voltage swing independent of the delay.
Public/Granted literature
- US20080284477A1 ON-CHIP JITTER MEASUREMENT CIRCUIT Public/Granted day:2008-11-20
Information query