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US07791330B2 On-chip jitter measurement circuit 失效
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On-chip jitter measurement circuit
Abstract:
An on-chip jitter measurement circuit and corresponding method are provided for receiving a reference clock and a signal of interest, the circuit including a latch for latching and comparing the arrival time of the signal of interest to the reference clock, a clock counter in signal communication with the latch for counting the number of reference clock cycles received and latched, a delay chain in signal communication with the reference clock for varying the arrival time of the reference clock, the delay chain having a first stage, middle stages, and a last stage, and a voltage controller in signal communication with at least one of the middle stages of the delay chain for controlling the delay of the arrival time of the reference clock, wherein the voltage controller controls the first and last stages of the delay chain to retain a full voltage swing independent of the delay.
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