Invention Grant
- Patent Title: DC offset correcting device and DC offset correcting method
- Patent Title (中): DC偏移校正装置和DC偏移校正方法
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Application No.: US12297905Application Date: 2007-02-15
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Publication No.: US07791395B2Publication Date: 2010-09-07
- Inventor: Kiyoshi Yanagisawa , Noriaki Matsuno
- Applicant: Kiyoshi Yanagisawa , Noriaki Matsuno
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2006-117975 20060421
- International Application: PCT/JP2007/052743 WO 20070215
- International Announcement: WO2007/122844 WO 20071101
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
A signal generator generates a test signal including a positive signal and a negative signal which have the same amplitude. The signal generator corrects a DC level of the test signal based on a DC offset correcting signal supplied thereto, and supplies the corrected test signal to a frequency converter. An amplitude detector detects the amplitudes of the positive and negative signals of the test signal processed by the frequency converter. A level compressor converts in level the amplitudes of the positive and negative signals which are detected by the amplitude detector, with a gain variable depending on an input level thereto. A comparator compares the amplitudes of the positive and negative signals which are converted in level by the level compressor, with each other. An offset adjuster supplies the DC offset correcting signal depending on a compared result from the comparator to the signal generator.
Public/Granted literature
- US20090174456A1 DC Offset Correcting Device And DC Offset Correcting Method Public/Granted day:2009-07-09
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