Invention Grant
US07791519B2 Semiconductor device, semiconductor device testing apparatus, and semiconductor device testing method
有权
半导体器件，半导体器件测试装置和半导体器件测试方法
- Patent Title: Semiconductor device, semiconductor device testing apparatus, and semiconductor device testing method
- Patent Title (中): 半导体器件，半导体器件测试装置和半导体器件测试方法
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Application No.: US12293910Application Date: 2007-03-22
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Publication No.: US07791519B2Publication Date: 2010-09-07
- Inventor: Kazuo Matsukawa , Mitsutoshi Fujita
- Applicant: Kazuo Matsukawa , Mitsutoshi Fujita
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Steptoe & Johnson LLP
- Priority: JP2006-080656 20060323
- International Application: PCT/JP2007/055796 WO 20070322
- International Announcement: WO2007/122950 WO 20071101
- Main IPC: H03M1/66
- IPC: H03M1/66
Abstract:
In a pass/fail judgment test for a semiconductor IC having plural DACs, there is a problem that the test time is undesirably increased due to an increase on the number of DACs or an increase in resolution.When testing two DACs, i.e., DAC1 and DAC2, a control unit (170) alternately increases the digital input values of the DAC1 and DAC2, whereby the output of a comparator 1 to which the analog output values of the DAC1 and DAC2 are inputted repeats inversion between “0” and “1”. It is judged whether the DACs are conforming or not by judging with a judgment unit (180) whether the output pattern of the comparator 1 matches an expected value or not.
Public/Granted literature
- US20090128382A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE TESTING APPARATUS, AND SEMICONDUCTOR DEVICE TESTING METHOD Public/Granted day:2009-05-21
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