Invention Grant
US07792187B2 Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation 有权
多点决策反馈均衡器(DFE)架构消除了高速运行的关键定时路径

Multi-tap decision feedback equalizer (DFE) architecture eliminating critical timing path for higher-speed operation
Abstract:
A decision feedback equalizer (DFE) and method include summer circuits to add a dynamic feedback signal representing a dynamic feedback tap to a received input and to speculate on a speculative tap. Data slicers are configured to receive outputs of the summer circuits and sample the outputs of the summer circuits. First multiplexers are included, each of which is configured to receive a first input from a corresponding data slicer. Second multiplexers are included, each of which is configured to receive an output of a plurality of the first multiplexers. The second multiplexers have an output fed back to a second input of the first multiplexers, and the second multiplexer output is employed to provide a select signal for a second multiplexer on a different section of the DFE and to drive the dynamic feedback signal to a summer circuit on a same section of the DFE.
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