Invention Grant
- Patent Title: Partial page scheme for memory technologies
- Patent Title (中): 内存技术部分页面方案
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Application No.: US11140772Application Date: 2005-05-31
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Publication No.: US07793037B2Publication Date: 2010-09-07
- Inventor: Sandeep Jain , Animesh Mishra , Jim Kardach
- Applicant: Sandeep Jain , Animesh Mishra , Jim Kardach
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
Systems and methods of managing memory provide for detecting a request to activate a memory portion that is limited in size to a partial page size, where the partial page size is less than a full page size associated with the memory. In one embodiment, detecting the request may include identifying a row address and partial page address associated with the request, where the partial page address indicates that the memory portion is to be limited to the partial page size.
Public/Granted literature
- US20060271748A1 Partial page scheme for memory technologies Public/Granted day:2006-11-30
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