Invention Grant
- Patent Title: Method for preparing a circuit board material having a conductive base and a resistance layer
- Patent Title (中): 制备具有导电基底和电阻层的电路板材料的方法
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Application No.: US10719020Application Date: 2003-11-24
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Publication No.: US07794578B2Publication Date: 2010-09-14
- Inventor: Akira Matsuda , Yuuji Suzuki , Hideo Otsuka , Yuuki Kikuchi , Sadao Matsumoto
- Applicant: Akira Matsuda , Yuuji Suzuki , Hideo Otsuka , Yuuki Kikuchi , Sadao Matsumoto
- Applicant Address: JP Tokyo
- Assignee: The Furukawa Electric Co., Ltd.
- Current Assignee: The Furukawa Electric Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2002-341813 20021126
- Main IPC: C25D3/56
- IPC: C25D3/56
Abstract:
A plating bath, able to form a resistance layer with a uniform thickness distribution on the roughened surface of a conductive base, including nickel ions and sulfamic acid or its salt as essential components and at least one of phosphoric acid, phosphorous acid, hypophosphorous acid, and salts of the same; a conductive base having a thin resistance layer with a stable resistance, and a resistance circuit board material using the same.
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