Invention Grant
- Patent Title: Structure and method of high performance two layer ball grid array substrate
- Patent Title (中): 高性能双层球栅阵列衬底的结构与方法
-
Application No.: US12080961Application Date: 2008-04-09
-
Publication No.: US07795072B2Publication Date: 2010-09-14
- Inventor: Michael A. Lamson , Navinchandra Kalidas
- Applicant: Michael A. Lamson , Navinchandra Kalidas
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Yingsheng Tung; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/48
- IPC: H01L21/48

Abstract:
A high-performance, high I/O ball grid array substrate, designed for integrated circuit flip-chip assembly and having two patterned metal layers, comprising: an insulating layer having a first surface, a second surface and a plurality of vias filled with metal. Said first surface having one of said metal layers attached to provide electrical ground potential, and having a plurality of electrically insulated openings for outside electrical contacts. An outermost insulating film protecting the exposed surface of said ground layer, said film having a plurality of openings filled with metal suitable for solder ball attachment. Said second surface having the other of said metal layers attached, portions thereof being configured as a plurality of electrical signal lines, further portions as a plurality of first electrical power lines, and further portions as a plurality of second electrical power lines, selected signal and power lines being in contact with said vias. Said signal lines being distributed relative to said first power lines such that the inductive coupling between them reaches at least a minimum value, providing high mutual inductances and minimized effective self-inductance. Said signal lines further being electromagnetically coupled to said ground metal such that cross talk between signal lines is minimized. And an outermost insulating film protecting the exposed surfaces of said signal and power lines, said film having a plurality of openings filled with metal suitable for contacting selected signal and power lines and chip solder bumps.
Public/Granted literature
- US20080195990A1 Structure and method of high performance two layer ball grid array substrate Public/Granted day:2008-08-14
Information query
IPC分类: