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US07795119B2 Flash anneal for a PAI, NiSi process 有权
用于PAI,NiSi工艺的闪光退火

Flash anneal for a PAI, NiSi process
Abstract:
A structure and a method for mitigation of the damage arising in the source/drain region of a MOSFET is presented. A substrate is provided having a gate structure comprising a gate oxide layer and a gate electrode layer, and a source and drain region into which impurity ions have been implanted. A PAI process generates an amorphous layer within the source and drain region. A metal is deposited and is reacted to create a silicide within the amorphous layer, without exacerbating existing defects. Conductivity of the source and drain region is then recovered by flash annealing the substrate.
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