Invention Grant
- Patent Title: Semiconductor memory device with selective gate transistor
- Patent Title (中): 具有选择栅极晶体管的半导体存储器件
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Application No.: US11772446Application Date: 2007-07-02
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Publication No.: US07795668B2Publication Date: 2010-09-14
- Inventor: Koichi Matsuno
- Applicant: Koichi Matsuno
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-267022 20060929
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
A semiconductor device includes a pair of selective gate lines formed above a semiconductor substrate, plural word lines formed above the substrate, plural contact plugs located between the selective gate lines, a first insulator formed in the trenches between the word lines, the first insulator including a first insulating film having a first upper surface flush with the substrate surface, a second insulator formed in the trenches between the contact plugs and including second and third insulating films, and a boro-phosphor-silicate glass film formed on the third insulating film and between the contact plugs. The second insulating film is of a kind same as the first insulating film. The third insulating film has a higher resistance to a wet etching process than the second insulating film. An interface between the second and third insulating films is located between a bottom and an upper end of the trench.
Public/Granted literature
- US20080087935A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Public/Granted day:2008-04-17
Information query
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