Invention Grant
- Patent Title: Wiring substrate and method of manufacturing thereof, and thin film transistor and method of manufacturing thereof
- Patent Title (中): 布线基板及其制造方法以及薄膜晶体管及其制造方法
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Application No.: US11934528Application Date: 2007-11-02
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Publication No.: US07795730B2Publication Date: 2010-09-14
- Inventor: Osamu Nakamura , Junko Sato
- Applicant: Osamu Nakamura , Junko Sato
- Applicant Address: JP Kanagawa-Ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-Ken
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JP2003-344257 20031002
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
The invention includes a first step for forming a first conductive layer composed of a high melting point metal to be in contact with an insulating layer; and a second step for forming a second conductive layer by discharging a composition containing a conductive material so as to be in contact with the first conductive layer. The first conductive layer is formed prior to forming the second conductive layer by droplet discharging, and hence, adhesiveness and peel resistance of the second conductive layer are improved. Furthermore, the insulating layer is covered with the first conductive layer, thereby preventing damage or destruction of the insulating layer.
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