Invention Grant
US07795735B2 Methods for forming single dies with multi-layer interconnect structures and structures formed therefrom
有权
用于形成具有多层互连结构和由其形成的结构的单模的方法
- Patent Title: Methods for forming single dies with multi-layer interconnect structures and structures formed therefrom
- Patent Title (中): 用于形成具有多层互连结构和由其形成的结构的单模的方法
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Application No.: US11689264Application Date: 2007-03-21
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Publication No.: US07795735B2Publication Date: 2010-09-14
- Inventor: Chao-Shun Hsu , Chen-Yao Tang , Clinton Chao , Mark Shane Peng
- Applicant: Chao-Shun Hsu , Chen-Yao Tang , Clinton Chao , Mark Shane Peng
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/46 ; H01L21/4763
Abstract:
A method for forming a single die includes forming at least one first active device over a first substrate and at least one first metallic layer coupled to the first active device. At least one second metallic layer is formed over a second substrate, wherein the second substrate does not include any active device. The at least one first metallic layer is bonded with the at least one second metallic layer such that the first substrate and the second substrate constitute a single die.
Public/Granted literature
- US20080233710A1 METHODS FOR FORMING SINGLE DIES WITH MULTI-LAYER INTERCONNECT STRUCTURES AND STRUCTURES FORMED THEREFROM Public/Granted day:2008-09-25
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