Invention Grant
- Patent Title: Reduction of dead-time distortion in class D amplifiers
- Patent Title (中): 减少D类放大器的死区时间失真
-
Application No.: US12369489Application Date: 2009-02-11
-
Publication No.: US07795970B2Publication Date: 2010-09-14
- Inventor: Cetin Kaya , Adam Shook
- Applicant: Cetin Kaya , Adam Shook
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03F3/217
- IPC: H03F3/217

Abstract:
Pulse-width-modulating class D amplifier with an H-bridge output stage, and method of operating the same. in which output stage dead-time is compensated. Offset logic circuitry detects various dead-time-related conditions at push-pull output drivers, and generates an offset signal applied to the amplified differential input signal, to adjust the time at which the voltage at differential signal lines crosses a ramp reference waveform. The offset signal can correspond to the duration of a disturbance (dead-time at one driver in combination with an active signal at the active driver), or the sum of that disturbance duration with a dead-time at the active driver. The offset signal is generated by charging a capacitor for the duration of this disturbance, or disturbance plus dead-time. According to another approach, error is reduced by charging a capacitor for each transition of the signal for a duration of the dead-time of the active driver. Total harmonic distortion is reduced without requiring increased circuit complexity and without shortening the dead-time to unsafe margins.
Public/Granted literature
- US20100201443A1 REDUCTION OF DEAD-TIME DISTORTION IN CLASS D AMPLIFIERS Public/Granted day:2010-08-12
Information query
IPC分类: