A display panel includes a first substrate, a second substrate, a liquid crystal layer, a seal line and an outer spacer. The first substrate includes a display area on which a plurality of thin film transistors are formed, and a peripheral area surrounding the display area. The second substrate is opposite to the first substrate. The liquid crystal layer is disposed between the first substrate and the second substrate. The seal line is formed between the first substrate and the second substrate in the peripheral area to confine the liquid crystal between the first and second substrates. The outer spacers are disposed in the peripheral area, and inwardly spaced apart from the seal line by a separation distance thereby preventing liquid crystal from being polluted by particles of an uncured seal line during manufacturing.