Invention Grant
- Patent Title: Circuit board and method for manufacturing the same
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Application No.: US11678321Application Date: 2007-02-23
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Publication No.: US07796845B2Publication Date: 2010-09-14
- Inventor: Makoto Murai , Ryosuke Usui
- Applicant: Makoto Murai , Ryosuke Usui
- Applicant Address: JP Osaka
- Assignee: Sanyo Electric Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Fish & Richardson P.C.
- Priority: JP2006-049345 20060224
- Main IPC: G02B6/12
- IPC: G02B6/12 ; H01L23/52 ; H01L23/40 ; H01L23/48 ; H05K1/18 ; H05K1/00 ; H01R12/04 ; H01L21/4763

Abstract:
Provided is a circuit board which suppresses abnormal formation of plated layer inside a via, caused by core materials of glass fibers or the like projected from a side wall of the via and which helps to improve the connection reliability of the via. An insulating layer, which is formed of thermoset resin and embedded with glass fibers, is provided between a first wiring layer and a second wiring layer. The glass fibers projected into a via hole side from a side wall of the via hole in different positions are embedded into a via conductor in such a state that the glass fibers are jointed with each other.
Public/Granted literature
- US20070199733A1 CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2007-08-30
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