Invention Grant
US07797467B2 Systems for implementing SDRAM controllers, and buses adapted to include advanced high performance bus features
有权
用于实现SDRAM控制器的系统，以及适用于包括先进高性能总线功能的总线
- Patent Title: Systems for implementing SDRAM controllers, and buses adapted to include advanced high performance bus features
- Patent Title (中): 用于实现SDRAM控制器的系统，以及适用于包括先进高性能总线功能的总线
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Application No.: US11520219Application Date: 2006-09-13
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Publication No.: US07797467B2Publication Date: 2010-09-14
- Inventor: Frank Worrell , Keith D. Au
- Applicant: Frank Worrell , Keith D. Au
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agent Christopher P. Maiorana, PC
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to encode a priority of a plurality of input signals. The second circuit may be configured to generate the plurality of input signals in response to one or more signals received from each of a plurality of ports. The apparatus generally provides dynamic priority arbitration for the plurality of ports.
Public/Granted literature
Information query
