Invention Grant
US07797600B2 Method and apparatus for testing a ring of non-scan latches with logic built-in self-test
失效
用逻辑内置自检来测试非扫描锁存环的方法和装置
- Patent Title: Method and apparatus for testing a ring of non-scan latches with logic built-in self-test
- Patent Title (中): 用逻辑内置自检来测试非扫描锁存环的方法和装置
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Application No.: US12139114Application Date: 2008-06-13
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Publication No.: US07797600B2Publication Date: 2010-09-14
- Inventor: Louis B. Bushard , Nathan P. Chelstrom , Naoki Kiryu , David J. Krolak
- Applicant: Louis B. Bushard , Nathan P. Chelstrom , Naoki Kiryu , David J. Krolak
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Matthew B. Talpis
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A method and apparatus for loading a ring of non-scan latches for a logic built-in self-test. A logic built-in self-test value is loaded into a scannable latch from the logic built-in self-test. An override control signal is asserted in response to loading the logic built-in self-test value into the scannable latch. A non-scan latch is forced to load the logic built-in self-test value from the scannable latch in response to asserting the override control signal. Logic paths in the ring of non-scan latches are exercised. The non-scan latch is part of the logical paths. The test results are captured from the logic paths and the test results are compared against expected test results to determine if the logic paths within the ring of non-scan latches are functioning properly.
Public/Granted literature
- US20080250290A1 Method and Apparatus for Testing a Ring of Non-Scan Latches with Logic Built-in Self-Test Public/Granted day:2008-10-09
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