Invention Grant
- Patent Title: Method of forming through hole and method of manufacturing electronic circuit
- Patent Title (中): 形成通孔的方法和制造电子电路的方法
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Application No.: US11362826Application Date: 2006-02-28
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Publication No.: US07799370B2Publication Date: 2010-09-21
- Inventor: Hiroyuki Tokunaga , Osamu Kanome
- Applicant: Hiroyuki Tokunaga , Osamu Kanome
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2005-057995 20050302
- Main IPC: B29C65/00
- IPC: B29C65/00

Abstract:
Provided is a method of manufacturing an electronic circuit. The method includes the steps of: forming a nucleus comprising thermo-expandable particles on a conductive layer provided on an insulating substrate; forming an insulating film on the conductive layer having the nucleus-formed thereon; forming an opening by heating the substrate to expand the thermo-expandable particles and form a cleavage in the insulating film; and forming another conductive layer comprising a conductive material on the opening and the insulating film such that the upper and lower conductive layers are electrically connected to each other via the conductive material through the insulating film. This allows formation of a through hole in an electric circuit with ease without photolithographic processes such as exposure, development, and etching.
Public/Granted literature
- US20060196598A1 Method of forming through hole and method of manufacturing electronic circuit Public/Granted day:2006-09-07
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