Invention Grant
- Patent Title: Trench MOSFET and method of manufacture utilizing two masks
- Patent Title (中): 沟槽MOSFET和利用两个掩模的制造方法
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Application No.: US11866365Application Date: 2007-10-02
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Publication No.: US07799642B2Publication Date: 2010-09-21
- Inventor: Shih Tzung Su , Jun Zeng , Poi Sun , Kao Way Tu , Tai Chiang Chen , Long Lv , Xin Wang
- Applicant: Shih Tzung Su , Jun Zeng , Poi Sun , Kao Way Tu , Tai Chiang Chen , Long Lv , Xin Wang
- Applicant Address: HK Hong Kong
- Assignee: Inpower Semiconductor Co., Ltd.
- Current Assignee: Inpower Semiconductor Co., Ltd.
- Current Assignee Address: HK Hong Kong
- Agency: Hayes Soloway P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for manufacturing a trench MOSFET semiconductor device comprises: providing a heavily doped N+ silicon substrate; forming an N type epitaxial layer; forming a thick SiO2 layer; creating P body and source area formations by ion implantation without any masks; utilizing a first mask to define openings for a trench gate and a termination; thermally growing a gate oxide layer followed by formation of a thick poly-Silicon refill layer without a mask to define a gate bus area; forming sidewall spacers; forming P+ areas; removing the sidewall spacers; depositing tungsten to fill contacts and vias; depositing a first thin barrier metal layer; depositing a first thick metal layer; utilizing a second metal mask to open a gate bus area; forming second sidewall spacers; depositing a second thin barrier metal layer; depositing a second thick metal layer; and planarizing at least the second thick metal layer and the second thin metal layer to isolate the source metal portions from gate metal portions, whereby the trench MOSFET semiconductor device is manufactured utilizing only first and second masks.
Public/Granted literature
- US20090085105A1 TRENCH MOSFET AND METHOD OF MANUFACTURE UTILIZING TWO MASKS Public/Granted day:2009-04-02
Information query
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