Invention Grant
- Patent Title: Method for fabricating semiconductor integrated circuit device
- Patent Title (中): 制造半导体集成电路器件的方法
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Application No.: US11808805Application Date: 2007-06-13
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Publication No.: US07799690B2Publication Date: 2010-09-21
- Inventor: Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
- Applicant: Yoshikazu Tanabe , Satoshi Sakai , Nobuyoshi Natsuaki
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP9-50781 19970305
- Main IPC: H01L21/311
- IPC: H01L21/311

Abstract:
A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of oxide film and uniformity in thickness of the oxide film.
Public/Granted literature
- US20080045027A1 Method for fabricating semiconductor intergrated circuit device Public/Granted day:2008-02-21
Information query
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