Invention Grant
- Patent Title: Chip-scale monolithic load switch for portable applications
- Patent Title (中): 用于便携式应用的芯片级单片负载开关
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Application No.: US11336306Application Date: 2006-01-18
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Publication No.: US07800223B2Publication Date: 2010-09-21
- Inventor: Samuel J. Anderson , David N. Okada
- Applicant: Samuel J. Anderson , David N. Okada
- Applicant Address: US AZ Tempe
- Assignee: Great Wall Semiconductor Corporation
- Current Assignee: Great Wall Semiconductor Corporation
- Current Assignee Address: US AZ Tempe
- Agent Robert D. Atkins
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L27/10

Abstract:
A chip-scale package houses a monolithic semiconductor die containing first and second lateral metal oxide semiconductor field effect transistors (MOSFETs) formed on a surface of the semiconductor die. The MOSFETs are formed using a lateral double diffused metal oxide semiconductor structure. The first MOSFET has a first conduction terminal coupled to a first package terminal and a second conduction terminal coupled to a second package terminal. The second MOSFET has a first conduction terminal coupled to a control terminal of the first MOSFET, a second conduction terminal coupled to a third package terminal, and a control terminal coupled to a fourth package terminal. A resistor is coupled between the first package terminal and the control terminal of the first MOSFET. A logic level enable signal controls the first MOSFET to enable the second MOSFET to connect a DC voltage from the first package terminal to the second package terminal.
Public/Granted literature
- US20060163709A1 Chip-scale monolithic load switch for portable applications Public/Granted day:2006-07-27
Information query
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