Invention Grant
US07800225B2 Microelectronic die including locking bump and method of making same
有权
包括锁定凸块的微电子模具及其制造方法
- Patent Title: Microelectronic die including locking bump and method of making same
- Patent Title (中): 包括锁定凸块的微电子模具及其制造方法
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Application No.: US11761060Application Date: 2007-06-11
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Publication No.: US07800225B2Publication Date: 2010-09-21
- Inventor: Seon-ho Choi
- Applicant: Seon-ho Choi
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/302
- IPC: H01L21/302
Abstract:
A microelectronic die and a method of providing same. The die includes a die substrate having an active surfaces and a locking bump on the active surface of the die substrate. The locking bump defines a recess adapted to receive therein a solder bump of a package substrate such that an apex of the solder bump contacts a bottom of the recess.
Public/Granted literature
- US20080303143A1 Microelectronic Die Including Locking Bump and Method of Making Same Public/Granted day:2008-12-11
Information query
IPC分类:
