Invention Grant
US07800227B2 Semiconductor device with crack-resistant multilayer copper wiring 有权
具有抗裂多层铜线的半导体器件

Semiconductor device with crack-resistant multilayer copper wiring
Abstract:
In a semiconductor device including a multilayer pad, the multilayer pad comprises a first pad layer provided over a semiconductor substrate to have a first copper wiring region and a first intralayer insulating region provided within the first copper wiring region, and a second pad layer provided over the first pad layer via an interlayer insulating film to have a second copper wiring region and a second intralayer insulating region provided within the second copper wiring region. In the semiconductor device, the first copper wiring region, the first intralayer insulating region, the second copper wiring region, and the second intralayer insulating region are provided in the first and second pad layers such that the multilayer pad has a layout in which all the regions are covered with the copper wiring when the multilayer pad is perspectively viewed from a perpendicularly upper direction for the semiconductor substrate.
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