Invention Grant
- Patent Title: Test structures, systems, and methods for semiconductor devices
- Patent Title (中): 用于半导体器件的测试结构,系统和方法
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Application No.: US11861461Application Date: 2007-09-26
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Publication No.: US07800381B2Publication Date: 2010-09-21
- Inventor: Wolfgang Marbler
- Applicant: Wolfgang Marbler
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
Test structures, systems, and methods for semiconductor devices are disclosed. In one embodiment, a test structure for a semiconductor device includes a winding disposed in at least one conductive material layer of the semiconductor device. At least a portion of the winding extends proximate a perimeter of the semiconductor device. The winding includes a first end and a second end. A first test pad is coupled to the first end of the winding, and a second test pad is coupled to the second end of the winding.
Public/Granted literature
- US20090079449A1 Test Structures, Systems, and Methods for Semiconductor Devices Public/Granted day:2009-03-26
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