Invention Grant
- Patent Title: Frequency adjustment for clock generator
- Patent Title (中): 时钟发生器的频率调整
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Application No.: US12236042Application Date: 2008-09-23
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Publication No.: US07800451B2Publication Date: 2010-09-21
- Inventor: Zhuo Fu , Vivek Sarda , Pio Balmelli
- Applicant: Zhuo Fu , Vivek Sarda , Pio Balmelli
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Zagorin O'Brien Graham LLP
- Main IPC: H03L7/08
- IPC: H03L7/08 ; H04B1/69

Abstract:
A fractional-N divider receives an input signal and supplies a divided signal divided in accordance with an integer divide control signal determined from a divide ratio. A phase interpolator is coupled to the fractional-N divider to adjust a phase of the divided signal according to a fractional portion of the divide ratio. The apparatus, responsive to a request for a frequency adjustment of the generated signal in a programmable number of steps, is configured to adjust the frequency of the generated signal from a beginning frequency to an ending frequency in the programmable number of steps by adjusting the supplied divide ratio at each step.
Public/Granted literature
- US20100045395A1 FREQUENCY ADJUSTMENT FOR CLOCK GENERATOR Public/Granted day:2010-02-25
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