Invention Grant
US07800960B2 Voltage generator for nonvolatile memory and writing and erasing method of nonvolatile memory
有权
非易失性存储器的电压发生器和非易失性存储器的写入和擦除方法
- Patent Title: Voltage generator for nonvolatile memory and writing and erasing method of nonvolatile memory
- Patent Title (中): 非易失性存储器的电压发生器和非易失性存储器的写入和擦除方法
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Application No.: US12071765Application Date: 2008-02-26
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Publication No.: US07800960B2Publication Date: 2010-09-21
- Inventor: Yasuhiro Tonda , Hidetoshi Ozoe , Hideaki Uemura , Junichi Yamada , Kenji Hibino , Tatsuya Saito
- Applicant: Yasuhiro Tonda , Hidetoshi Ozoe , Hideaki Uemura , Junichi Yamada , Kenji Hibino , Tatsuya Saito
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2007-046527 20070227
- Main IPC: G11C5/14
- IPC: G11C5/14

Abstract:
A voltage generator for nonvolatile memory that generates an applied voltage to be applied to a nonvolatile memory includes a first voltage generator to generate a first voltage corresponding to the applied voltage, a reference voltage generator to generate a reference voltage, a comparator to compare the first voltage with the reference voltage and output a boost operation control signal according to a comparison result, and a booster to generate the applied voltage in a pulse-like voltage waveform by starting or stopping boost operation based on the boost operation control signal. The applied voltage corresponding to the first voltage upon inversion of the boost operation control signal is varied within one pulse-like voltage waveform by varying one of the first voltage and the reference voltage.
Public/Granted literature
- US20080205167A1 Voltage generator for nonvolatile memory and writing and erasing method of nonvolatile memory Public/Granted day:2008-08-28
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