A transmission delay measuring circuit may include a first transmission path, a second transmission path, an inversion circuit, a first multiplexer, and an output terminal. The second transmission path may have the same structure as the structure of the first transmission path and may receive the output of the first transmission path. The inversion circuit may invert the output of the second transmission path. The first multiplexer may output one of the external input signal and an inverted output of the second transmission path to the first transmission path in response to a test mode enable signal. The output terminal may output, as a measuring signal, a signal in an arbitrary node of a closed loop formed of the first transmission path, the second transmission path, the inversion circuit, and the first multiplexer. The transmission delay measuring apparatus may more accurately measure the transmission delay of a transmission path in a semiconductor device in a die-to-die wafer state or a package state.