Invention Grant
- Patent Title: Functional block level clock-gating within a graphics processor
- Patent Title (中): 图形处理器内的功能块级时钟门控
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Application No.: US11614248Application Date: 2006-12-21
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Publication No.: US07802118B1Publication Date: 2010-09-21
- Inventor: Karim M. Abdalla , Robert J. Hasslen, III
- Applicant: Karim M. Abdalla , Robert J. Hasslen, III
- Applicant Address: US CA Santa Clara
- Assignee: Nvidia Corporation
- Current Assignee: Nvidia Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Cooley LLP
- Main IPC: G06F1/32
- IPC: G06F1/32
Abstract:
An embodiment of the invention includes receiving an indicator of a flow of data associated with a graphics processing stage within a graphics pipeline of a graphics processor. A clock signal to a portion of the graphics processing stage is modified based on a status of the flow of data. The clock signal is received from a clock signal generator within the graphics processor.
Information query
