Invention Grant
- Patent Title: Methods for filling holes in printed wiring boards
- Patent Title (中): 填充印刷电路板孔的方法
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Application No.: US10765201Application Date: 2004-01-28
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Publication No.: US07802360B2Publication Date: 2010-09-28
- Inventor: Deepak Keshav Pai , Chris H. Simon
- Applicant: Deepak Keshav Pai , Chris H. Simon
- Applicant Address: US VA Fairfax
- Assignee: General Dynamics Advanced Information Systems, Inc.
- Current Assignee: General Dynamics Advanced Information Systems, Inc.
- Current Assignee Address: US VA Fairfax
- Agency: Steptoe & Johnson LLP
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board.
Public/Granted literature
- US20050011069A1 Methods for filling holes in printed wiring boards Public/Granted day:2005-01-20
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