Invention Grant
- Patent Title: Method of forming a vertical diode and method of manufacturing a semiconductor device using the same
- Patent Title (中): 形成垂直二极管的方法和使用其制造半导体器件的方法
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Application No.: US12034440Application Date: 2008-02-20
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Publication No.: US07803679B2Publication Date: 2010-09-28
- Inventor: Sang-Jin Park , Kong-Soo Lee , Yong-Woo Hyung , Young-Sub You , Jae-Jong Han
- Applicant: Sang-Jin Park , Kong-Soo Lee , Yong-Woo Hyung , Young-Sub You , Jae-Jong Han
- Applicant Address: KR Gyeonggi-Do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2007-0017451 20070221
- Main IPC: H01L29/88
- IPC: H01L29/88

Abstract:
A method of forming a vertical diode and a method of manufacturing a semiconductor device (e.g., a semiconductor memory device such as a phase-change memory device) includes forming an insulating structure having an opening on a substrate and filling the opening with an amorphous silicon layer. A metal silicide layer is formed to contact at least a portion of the amorphous silicon layer and a polysilicon layer is then formed in the opening by crystallizing the amorphous silicon layer using the metal silicide layer. A doped polysilicon layer is formed by implanting impurities into the polysilicon layer. Thus, the polysilicon layer is formed in the opening without performing a selective epitaxial growth (SEG) process, so that electrical characteristics of the diode may be improved.
Public/Granted literature
- US20080200014A1 METHOD OF FORMING A VERTICAL DIODE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME Public/Granted day:2008-08-21
Information query
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