Invention Grant
US07803714B2 Semiconductor through silicon vias of variable size and method of formation
有权
半导体通过可变尺寸的硅通孔和形成方法
- Patent Title: Semiconductor through silicon vias of variable size and method of formation
- Patent Title (中): 半导体通过可变尺寸的硅通孔和形成方法
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Application No.: US12059123Application Date: 2008-03-31
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Publication No.: US07803714B2Publication Date: 2010-09-28
- Inventor: Chandrasekaram Ramiah , Paul W. Sanders
- Applicant: Chandrasekaram Ramiah , Paul W. Sanders
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Kim-Marie Vo
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
A through-silicon via structure is formed by providing a substrate having a first conductive catch pad and a second conductive catch pad formed thereon. The substrate is secured to a wafer carrier. A first etch of a first type is performed on the substrate underlying each of the first and second conductive catch pads to form a first partial through-substrate via of a first diameter underlying the first conductive catch pad and a second partial through-substrate via underlying the second conductive catch pad of a second diameter that differs from the first diameter. A second etch of a second type that differs from the first type is performed to continue etching the first partial through-substrate to form equal depth first and second through-substrate vias respectively to the first and second conductive catch pads.
Public/Granted literature
- US20090243074A1 SEMICONDUCTOR THROUGH SILICON VIAS OF VARIABLE SIZE AND METHOD OF FORMATION Public/Granted day:2009-10-01
Information query
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