Invention Grant
- Patent Title: Field effect transistor with a heterostructure
- Patent Title (中): 具有异质结构的场效应晶体管
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Application No.: US12353053Application Date: 2009-01-13
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Publication No.: US07804110B2Publication Date: 2010-09-28
- Inventor: Klaus Schruefer
- Applicant: Klaus Schruefer
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agency: Brinks Hofer Gilson & Lione
- Priority: DE10360874 20031223
- Main IPC: H01L31/072
- IPC: H01L31/072

Abstract:
A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystalline semiconductor layer has a semiconductor alloy (GexSi1−x), where the proportion x of a second semiconductor material can be set freely. Furthermore, a gate insulation layer and a gate layer are formed on the strained semiconductor layer. To define an undoped channel region, drain/source regions are formed laterally with respect to the gate layer at least in the strained semiconductor layer. The possibility of freely setting the Ge proportion x enables a threshold voltage to be set as desired, whereby modern logic semiconductor components can be realized.
Public/Granted literature
- US20090121289A1 FIELD EFFECT TRANSISTOR WITH A HETEROSTRUCTURE AND ASSOCIATED PRODUCTION METHOD Public/Granted day:2009-05-14
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