Invention Grant
- Patent Title: Wire bond integrated circuit package for high speed I/O
- Patent Title (中): Wire Bond集成电路封装，适用于高速I / O
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Application No.: US11565701Application Date: 2006-12-01
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Publication No.: US07804167B2Publication Date: 2010-09-28
- Inventor: Clifford Fishley , Abiola Awujoola , Leonard Mora , Amar Amin , Maurice Othieno , Chok J. Chia
- Applicant: Clifford Fishley , Abiola Awujoola , Leonard Mora , Amar Amin , Maurice Othieno , Chok J. Chia
- Applicant Address: US CA Milpitas
- Assignee: LSI Logic Corporation
- Current Assignee: LSI Logic Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Ottersedt, Ellenbogen & Kammer, LLP
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/768
Abstract:
An integrated circuit package includes a package substrate, a die attach pad formed on the package substrate for securing a die to the package substrate, a ground bonding ring formed on the package substrate for attaching core and I/O ground bond wires between the die and the package substrate, and a first plurality of bond fingers formed immediately adjacent to the ground bonding ring for attaching a first set of I/O signal bond wires between the package substrate and the die.
Public/Granted literature
- US20080128919A1 WIRE BOND INTEGRATED CIRCUIT PACKAGE FOR HIGH SPEED I/O Public/Granted day:2008-06-05
Information query
IPC分类:
