Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US11626286Application Date: 2007-01-23
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Publication No.: US07804176B2Publication Date: 2010-09-28
- Inventor: Kazuko Hanawa , Takashi Kikuchi , Koichi Kanemoto , Michiaki Sugiyama , Chikako Imura
- Applicant: Kazuko Hanawa , Takashi Kikuchi , Koichi Kanemoto , Michiaki Sugiyama , Chikako Imura
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, P.C.
- Priority: JP2006-045463 20060222
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
This invention is to provide a nonvolatile memory device that enhances a size reduction and mass productivity while ensuring reliability and signal transmission performance. A nonvolatile memory chip having a first side formed with no pads and a second side formed with pads is mounted on a mounting substrate. A control chip for controlling the nonvolatile memory chip is mounted on the nonvolatile memory chip. The control chip has a first pad row corresponding to the pads of the nonvolatile memory chip. The first pad row is mounted adjacent to the first side of the nonvolatile memory chip. The first pad row of the control chip and a first electrode row formed on the mounting substrate are connected via a first wire group. The pads of the nonvolatile memory chip and a second electrode row formed on the mounting substrate are connected via a second wire group. The first electrode row and the second electrode row are connected through wirings formed in the mounting substrate.
Public/Granted literature
- US20070194454A1 SEMICONDUCTOR DEVICE Public/Granted day:2007-08-23
Information query
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