In accordance with at least one embodiment, a method, apparatus, and article of manufacture are provided for configuring a virtual boundary register in a programmable logic device (PLD), transmitting a first user-definable-command operation code (opcode) to the PLD to effect programming of a memory device coupled to the PLD, and preferably transmitting a second user-definable-command opcode to the PLD, the second user-definable-command opcode causing the physical boundary scan circuitry to load the virtual boundary register. The foregoing is preferably achieved in accordance with a boundary scan standard (e.g., Institute of Electrical and Electronics Engineers, Inc. (IEEE) 1149.1, dated 2001).