Invention Grant
US07804847B2 Interface and related methods for rate pacing in an ethernet architecture
有权
以太网架构中的速率起搏接口和相关方法
- Patent Title: Interface and related methods for rate pacing in an ethernet architecture
- Patent Title (中): 以太网架构中的速率起搏接口和相关方法
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Application No.: US11876651Application Date: 2007-10-22
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Publication No.: US07804847B2Publication Date: 2010-09-28
- Inventor: Mark T. Feuerstraeter , Bradley J. Booth
- Applicant: Mark T. Feuerstraeter , Bradley J. Booth
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Caven & Aghevli LLC
- Main IPC: H04J3/22
- IPC: H04J3/22

Abstract:
An interface and related methods for rate pacing in an Ethernet architecture are described herein. In an embodiment, an effective data rate of communication channel with a remote network device is reduced based, at least in part, on an identified processing capability of the remote network device. In one embodiment, to reduce the effective data rate, one or more idle control elements are inserted between at least two frames of substantive content based, at least in part, on the processing capability of the remote network device. Other embodiments are also disclosed.
Public/Granted literature
- US20080037585A1 INTERFACE AND RELATED METHODS FOR RATE PACING IN AN ETHERNET ARCHITECTURE Public/Granted day:2008-02-14
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