Invention Grant
- Patent Title: Multiple address and arithmetic bit-mode data processing device and methods thereof
- Patent Title (中): 多地址和算术位模式数据处理装置及其方法
-
Application No.: US11679590Application Date: 2007-02-27
-
Publication No.: US07805581B2Publication Date: 2010-09-28
- Inventor: Michael D. Snyder , David C. Holloway , Trinh H. Nguyen , Sergio Schuler , Gary L. Whisenhunt
- Applicant: Michael D. Snyder , David C. Holloway , Trinh H. Nguyen , Sergio Schuler , Gary L. Whisenhunt
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A data processing device and methods thereof are disclosed. The data processing device can operate in three different modes. In a first, N-bit mode, the data processing device performs memory accesses based on N-bit values and performs arithmetic operations using N-bit values. In a second, hybrid N-bit/M-bit mode, the data processing device performs memory accesses based on M-bit values, where M is less than N, and performs arithmetic operations using N-bit values. In a third, M-bit mode, the data processing device performs memory accesses based on M-bit values and performs arithmetic operations using M-bit values. The three modes provide for compatibility with a wide range of applications. Further operation in the M-bit mode can provide a power savings when implementing applications compatible with that mode.
Public/Granted literature
- US20080209182A1 MULTI-MODE DATA PROCESSING DEVICE AND METHODS THEREOF Public/Granted day:2008-08-28
Information query