Invention Grant
US07805586B2 System and method for optimizing interconnections of memory devices in a multichip module
有权
用于优化多芯片模块中存储器件互连的系统和方法
- Patent Title: System and method for optimizing interconnections of memory devices in a multichip module
- Patent Title (中): 用于优化多芯片模块中存储器件互连的系统和方法
-
Application No.: US11432013Application Date: 2006-05-10
-
Publication No.: US07805586B2Publication Date: 2010-09-28
- Inventor: Kevin J. Ryan
- Applicant: Kevin J. Ryan
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28

Abstract:
An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have the same propagation time regardless of which device is involved. The hub receives memory signals from a controller over a high speed data link which the hub translates into electrical data, command and address signals. These signals are applied to the memory devices over busses having equivalent path lengths. The busses may also be used by the memory devices to apply data signals to the memory hub. Such data signals can be converted by the memory hub into memory signals and applied to the controller over the high speed data link. In one example, the memory hub is located in the center of the memory module.
Public/Granted literature
- US20060206667A1 System and method for optimizing interconnections of memory devices in a multichip module Public/Granted day:2006-09-14
Information query