Invention Grant
- Patent Title: Stacked module and manufacturing method thereof
- Patent Title (中): 堆叠模块及其制造方法
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Application No.: US11688362Application Date: 2007-03-20
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Publication No.: US07807499B2Publication Date: 2010-10-05
- Inventor: Yoshihiko Nishizawa
- Applicant: Yoshihiko Nishizawa
- Applicant Address: JP Kyoto
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP2004-284631 20040929
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A manufacturing method of a stacked module includes a step of fabricating the first wiring board which includes a wiring pattern provided on at least one of a surface and an inner portion and a bump electrode which is integrated from the simultaneous sintering with the wiring pattern, and which extends in the vertical direction, a step of layering the first wiring board with the second wiring board having the wiring pattern provided on at least one of the surface and the inner portion thereof to be connected to the second wiring board via the bump electrode.
Public/Granted literature
- US20070161266A1 STACKED MODULE AND MANUFACTURING METHOD THEREOF Public/Granted day:2007-07-12
Information query
IPC分类:
